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From YouTube: CHIPS Alliance Workshop - September 17, 2020

Description

CHIPS Alliance, the open source RTL hardware and software development tool organization, gathered to share milestones, progress, updates and more.

Open Design Verification – Tao Liu, Google
Enabling Fully Open Source And Continuous Integration-Driven Flows in ASIC and FPGA Development – Michael Gielda, Antmicro
The Emergence of the Open-Source AIB Chiplet Ecosystem – David Kehlet, Intel
Chipyard: Design of Customized Open-Source RISC-V SoCs – Borivoje Nikolic, UC Berkeley
SweRV and/or OmniXtend Milestones – Zvonimir Bandic, WDC
Chisel & FIRRTL for next-generation SoC designs – Jack Koenig, SiFive
Open ML Accelerator – Anoop Saha, Mentor
Cloud Based Verification of RISC-V Processors – Dan Ganousis, Metrics
OpenROAD Open RTL-to-GDS Update – Andrew Kahng, OpenRoad/UCSD, and Mohamed Kassem, Efabless
Open Source FPGA Tooling, Our Journey from Resistance to Adoption – Brian Faith, QuickLogic