►
From YouTube: .NET Design Review: ARM Intrinsics
Description
No description was provided for this meeting.
If this is YOUR meeting, an easy way to fix this is to add a description to your video, wherever mtngs.io found it (probably YouTube).
A
B
Like
what
did
I
talk
about
yeah
so
I
want
you
to
go
over
meta
point
first,
so
there's
a
few
api's
which
take
a
vector
64
of
double
long
and
you
long.
These
are
still
vector
types
but
they're,
effectively,
a
scalar
being
that
the
underlying
T
is
the
same
size
as
the
vector
itself.
How
they're
exposed
in
the
api's
depends
on
a
couple
things
or
api's,
where
there
is
an
explicit,
separate,
scalar
instruction
or
encoding,
such
as
for
absolute
value
or
and
they're
exposed
as
instruction
scalar.
B
So
if
you
scroll
down
just
two
lines
here,
you'll
see
that
there's
an
absence.
Taylor
of
devil,
however,
there's
also
some
api's
like
bitwise
and
which
don't
expose
the
API
as
scalar,
and
this
is
because
there
is
no
distinct
instruction
or
a
scalar
operation
under
the
covers.
It's
just
a
bitwise
operation
doesn't
care
about
the
encode,
so
we've
just
exposed
it
all
as
the
same
name.
B
And
then
I'd
like
to
go
through
this
is
we
can
just
go
through?
The
API
is
on
here
touching
on
a
few
on
a
couple
meta
points
as
we
go
through
them
and
then
there's
two
issues
that
were
opened
recently,
that
we
should
go
through
as
well
that
cover
additional
API
is
that
I
wasn't
able
to
get
into
this,
namely
because
it's
it's
quite
an
intensive
work
to
have
to
go
through
the
are
manual
and
match
to
form
32
and
our
64
go.
B
B
Roughly
the
same
number
there
there
there's
a
few.
What
one
of
the
meta
points
is
that
there's
a
few
instructions,
such
as
the
compare,
compare
instructions
where
arm
actually
also
expose
that
they
expose,
for
example,
compare
it
equal
that
takes
a
left
and
a
right,
and
they
expose
a
compare
equal
to
zero,
which
takes
just
a
value
and
implicitly
compares
to
zero.
So
that
would
theoretically
mean
we
double
the
number
of
overloads
there,
but
I
believe
we
should
instead
only
expose
the
compare
equal
overload
and
then
the
JIT
should
be
able
to
say.
B
A
B
On
x86,
there
was
vector
128
in
vector
256
of
T,
where
the
T
could
be
one
of
the
ten
primitive
types.
So
there's
eight
integer
types,
byte
s,
byte
short.
U
short
in
you
ant
long
and
you
long
and
then
there's
the
two
floating
point:
types
float
and
double
on
arm,
at
least
today
in
the
future
they
will
support
more,
such
as
sve
extensions,
but
today
they
support,
vector,
64
and
vector
128,
and
so
those
are
the
only
two
types
that
you'll
be
in
these
api.
B
Types
on
the
left
are
the
names
of
the
ISAs
they
map
to
the
underlying
name
of
the
ISA
as
exposed
by
the
architecture.
Manual.
Advanced
MD
is
actually
an
interesting
one
where
they
have
a
we're.
Advanced
MD
does
not
represent
a
single
bit
of
true
or
false.
It
actually
represents
a
range
of
bits
where
you
have,
for
example,
advanced
MD.
Zero
would
be
the
zeroth
bit,
and
if
it's
one
then
it's
supported
if
it's
zero,
it's
not
and
then
there's
also
I
believe
the
first
bit,
which
represents
FP.
B
E
B
B
C
B
G
B
Right
so
for
absolute
value,
so
one
other
meta
point
that
might
be
important
to
call
out
now
arm.
Thirty-Two
in
particular
typically
supports
the
eight
integer
types
and
flow
they
don't
always
arm.
Thirty-Two
does
not
always
support
long
and
you
long
and
it
generally
doesn't
support
double
outside
of
scalar,
which
is
why,
for
example,
you
see
float
here,
but
not
double,
whereas
the
double
overload
is
exposed
on
arms.
B
C
B
C
J
B
C
F
B
Leading
sign
count
is
not
leading
one
count.
It
is
the
number
of
bits
not
including
the
most
significant
bit
that
matched
the
most
significant
bit.
So
if
it's
a
zero
and
you've
got
a
zero
following
it
and
then
a
one,
it
will
be
or
one
okay,
if
it's
a
one
followed
by
two
ones
and
then
a
zero,
it
will
be
or
two
and.
B
And,
and
so
the
reason
we
have
the
unsigned
overloads
exposed
here
is,
namely
because
it
is
not
a
leading
one
count.
It
is
a
a.
B
That's
entirely
dependent
on
if
there's
additional
base
instructions
that
people
think
should
be
or
request
that
they
be
exposed.
There
is
more.
We
just
didn't
make
space
right,
there's
thousands
of
instructions
on
the
base
set,
but
most
of
them
are
things
like
add
two
integers
together,
which
we
don't
necessarily
care
about,
since
you
can
do
that
via
innocent.
M
C
N
N
Like
on
a
on
a
human
like
that
should
be
zero,
always
because
the
sign
that
was
evil,
because
it's
a
human
there
is
no
assignment.
So
it's
clear
and
it
sounds
like
the
description
is
this
just
looks
like
beehive
it
and
then
bits
beyond
it,
and
if
there's
no
sign
verses
unsigned
instruction-
and
this
will
possibly
give
you
the
wrong
answer,
if
you
were
counting
on
it.
For
that
reason,
yeah.
B
N
Long
that
max
value
I
would
expect
one
because
highest
bid
for
ulong
was
not
the
highest
bid
was
not
said,
and
the
sign
that
is
this
364th
and
I'm
like
be
looking
at
this
like
I,
cannot
imagine
anything
that
you
can
say
in
the
documentation.
That
would
lead
me
to
get
this
right
with
thee,
so
you're,
suggesting.
N
N
Right,
but
it's
treating
the
most
significant
that
are
you
treating
the
highest
bit
in
the
data
type
as
the
signed
it
and
then
computing
the
computations
the
rest
of
the
way.
They
say:
that's
not
the
sign
kit,
even
though
this
has
them,
and
even
though
you're
passing
it
along
like
the
instruction.
Basically
is
pretending
you're,
passing
it
along
right,
so
I
would
I
would
remove
the
unsigned
variance
of
this
and
oh
wait
for
someone
home.
C
C
B
C
N
C
Whether
there's
a
problem
so
I
the
the
reason
that
I've
changed
my
mind
and
subdeacon
is
because
I
have
a
local
you
int
I
equals
something
I
now
call
leading
sign.
Can't
if
the
you
and
overload
does
not
exist.
The
long
overload
gets
called
in
the
wrong
answer
gets
turned
on
our.
What?
If
we
leave
the
you
end
and
obsolete
true,
why
obsolete
over
them?
Because.
N
B
N
N
N
G
Q
It
would,
if
I
have
my
way
we're
going
to
strip
a
set
of
analyzers
in
the
box,
and
I
would
love
to
see
that,
but
for
intrinsic
safety
eyes.
Well,
there's
a
number
of
is
sorry.
I
was
just
to
say
it's
up
to
us.
What
you
want
to
put
in
there
and
I
think
a
barrier
to
entry
has
always
been
creating
good
analyzer
package,
figuring
out
how
and
where
it
ships
and
how
it
gets
added
to
projects
and
so
on
and
so
on.
Q
G
G
The
problem
really
is
is
that
even
if
we
wanted
to
add
one
like
people
would
not
reference
it
by
default
right,
even
if
we
added
and
leather
package,
you
would
have
to
elect
manually
at
the
new
that
package
reference
right,
there's,
nobody
ever
does
oh
I
assumed
it
would
be
in
box.
Well
that,
but
but
that's
there
doesn't
exist
today
right.
That's
the
whole
point
of
the
500
workers
to
make
sure
there
is
something
that
is
automatically
reference,
so
people
will
always
have
it.
Oh
and.
B
C
N
G
Q
N
Q
C
B
G
Q
N
I
have
to
it's
taking
thinking
Steve's
point
here
like
the
moment
that
you,
especially
you
know,
either
use
borrowers
passing
in
a
result
of
an
expression.
A
short
a
you
short
to
fight
in
this
fight
are
all
turning
into
end
as
far
as
this
is
concerned.
So,
if
we're
not
catching
all
the
lower
types
and
making
them
say
delete
the
other
signs,
if
you
went
those
too
long,
someone
should
very
quickly
understand.
N
C
N
C
Leading
zeros
on
my
bike.
Well,
the
ad
said
safety
eyes
like
they.
They
have
the
same
technical
issue
where
you
could
pass
in
a
byte
and
it
will
get
extended,
for
instance,
but
again
like
nobody
should
ever
have
had
an
expectation
in
the
first
place,
o8
that
offer
ends
being
balanced,
losing
those
I.
Q
If
I
actually
had
you
long
maxvalue,
it's
a
nonsensical
to
want
to
use
leading
sign
count
or
it'll
return,
the
couch
six
get
through
easier
for
them.
What's
up,
don't
return,
63
I
know
which
is
wrong.
If
I
had
you
long
done
max
value,
so
I'm
trying
to
say
like
if
I
actually
have
a
value
like
that,
you
see
I
just.
N
Not
call
this
yeah
I
mean
my
position
on
it.
Is
it
doesn't
make
sense
at
that
point,
so
you
have
to
have
you
have
to
figure
out
what
you
want
to
do
with
anything
bigger
than
long
that
max
value
before
you
call
the
underlying
thing?
Okay
or
your
special
case
for
oh,
if
that
then
say
zero
like,
but
that's
now
like
you
need
to
understand
what
you're
doing
with
numbers
that
don't
make
sense
with
this
instruction
sure.
B
H
D
B
B
So
are
you
what
was
this
about
decrypted
and
for
blasting?
That's!
What
XO
x86
exposes
the
first
three
plus
equipped
last
and
encrypt
yeah,
so
I
was
just
calling
out
the
difference
between.
If
we
call
single
round
encryption
and
single
round
decryption
encrypted
nuclear
connect.
Anything
you
don't
expose
a
yes,
we
do.
We
call
them
decrypt,
decrypt
last
and
not
encrypt.
Last
I
assume.
N
N
Is
it
if
you're
doing
a
yes
who's,
a
tested
and
certified
implementation?
Instead
of
trying
to
write
it
yourself,
yeah,
if
you're
using
the
processor,
AES
instructions
right
of
being
ever
with
math
or
you're
doing
cryptography
portney
these
exist
only
so
that
be
like
20
people
in
the
world?
Who
should
be
writing
documentation
of
AES
to
make
it
fast
go
on
these
processors,
those
people
using
dotnet
to
do
it
no
they're
using
C,
because
dotnet
can't
get
them
certified.
N
So
should
we
be
exposing
these
at
all?
Well,
we
had
the
discussion
back
with
with
all
the
crypto
primitive
instructions
with
the
exit
or
the
x86
and
amd64,
and
decided
that,
like
they
were
in
the
instruction
set,
you
can
call
them
and
see
us
having
a
policing
opinion
on
it.
Didn't
make
a
whole
lot
of
sense
and
they'll
be
down
to
something
like
the
security
analyzer
at
Roslin
has.
E
B
N
Think
defensive,
my
thing
is:
if
it's
an
area's
largest
and
so
but
like
we
have
Marvin
32.
If
and
since
it's
written
by
one
of
the
20
people
who
would
ever
write
an
implementation
of
AES
I
can
certainly
see
Niels,
saying
like
Oh
in
the
next
like.
If
we
decide,
we
need
to
replace
Marvin
32
with
something
every
processor
we
ever
care
about.
Has
AES
intrinsics
like
I'm
gonna,
do
like
a
es
single
round
encrypt,
followed
by
AES
mix,
followed
by
do
something
else
hey.
N
G
B
B
Fighting
with
the
most,
but
that
easy,
so
crc32
in
particular,
is
interesting
on
x86.
These
are
part
of
sse
for
two,
and
so
there
was
no
name
conflict
for
the
forearm.
The
is
a
is
called
crc32,
so
naturally
the
method
names
cannot
match
the
class
name.
What
do
we
want
to
call
him?
I
talked
briefly
with
levi
about
this
and
I
think
the
best
we
came
up
with
is
maybe
step
crc32
or
compute
crc32.
C
G
C
B
B
C
A
A
B
G
C
B
B
B
So
these
were
actually
reviewed
previously
way
back
when
we
did
the
first
pass
and
you
rejected
them
mo
because
you
didn't
like
the
underscores
in
the
name
but
I
believe
we
said
that
these
math
the
names
used
in
the
v-spec
'let's
for
these
algorithms,
and
so
we
should
keep
them
right.
Good
boy,
yeah,.
N
J
G
O
G
I
mean
practically
speaking
of
me.
Like
you
know,
hash
ABCD,
we
can
probably
be
really
could
rename.
The
thing
that
we
really
have
trouble
is
like
the
0
3,
and
what
7
we're
supposed
to
ever
score
is
meant
to
be
here
indicator
of
like
this
big
or
something
like
that's
a
problem
of
numbers.
That's
the
same
reason
that
we
did
this
whatever
this
enum
type
is
occlusive.
I
did.
G
B
N
R
N
C
C
O
G
B
B
Rest
of
this
should
hopefully
be
fairly
fast,
so
vector
128
supports
all
or
it
sports
nine
of
the
ten
primitive
types
it
doesn't.
Support
double
because
doubles
on
arm
64
and
the
vector
64
one
supports
all
of
the
non
64-bit
integral
types
the
64-bit
pipes
are
ad
scalar
you're
gonna
have
to
scroll
down.
H
B
N
B
B
B
B
B
C
A
A
C
B
S
T
M
C
O
N
B
N
C
G
B
B
Okay,
so
so
so
the
way
it
is
functionally
used
is
for
a
vectorized
ternary
select
per
element,
so
you
would
do
something
like
if
this
is
not
a
number,
then
do
a
comparison
for
an
amount.
Not
a
number
get.
The
bitwise
mask
of
all
ones
are
all
zeros
per
element,
and
then
you
use
that
as
the
mask
for
left
and
right,
replacing
them
on
number
values
with,
for
example,
zero.
Instead,
it's
so
it's
functionally
per
element
if
value
equals.
This
then
choose.
M
B
B
So
here's,
where
I
called
out
earlier,
our
meters
actually
compare
equal
and
compare
equal,
zero
I'm
saying
we
should
only
expose,
compare
equal
and
then
the
JIT
can
say
if
the
right-hand
parameter
is
zero,
then
go
ahead
and
admit
the
matter.
Instructions
like
we
have
a
vector
of
128
afloat,
not
zero,
yeah,
its
vector
of
t
dot,
zero.
N
Or
default
of
f3
I'm
just
wondering
like:
why
would
we
not
like,
in
addition
to
saying
that
it
can
understand
the
one
of
these
is
literally
zero?
It
can
rewrite
it
to
be
obvious.
Ac
easy,
probably
isn't
that
a
snake?
Is
it
worth
also
having
the
order
overload
one
just
because
like
why?
Why
should
you
need
to
pass
a
literal
zero
every
time,
but
we
could
just
like
it
curve
it
right
here
and
it's
like
a
little
bit
more
work
in
the
function
mapping,
but
actually
it's
less
work,
cuz
that
was
correct.
There's.
B
A
lot
more
so
it
means
that
there's
more
code
handling
in
the
JIT,
because
you
have
to
recognize
not
only
this.
You,
you
not
only
have
to
optimize
this
case,
but
you
also
have
to
handle
the
other
instruction
explicitly,
but
there's
also
it
would
significantly
blow
up
the
API
we'd
have
so
for
compared
there's,
like
already
eight
different
overloads
each
taking
ten
we're
going
to
double
that.
So
now
we've
got
160
api's
for
something
where
you
could
just
trivially
pass
in
zero.
B
F
C
B
B
Also,
notably,
the
be
explicit
overload
that
takes
the
air
I
believe
is
only
available
on
arms,
so
that
was
another
reason
knocked
him.
Is
there
an
actual
compare
greater
than
instruction
and
a
compare
less
on
instruction?
Yes,
notably
so
so
there's
actually
there's
actually
different
instructions
for
signed
and
unsigned
where
the
unsigned
is
actually
called
I
believe
it's
higher
than
that's
why
you
have
unsigned
overloads
there?
Okay,.
C
C
B
So
be
just
like
on
x86,
so
on
x86
will
take
the
operands
and
we
know
whether
they're
an
indirection,
and
then
we
can
appropriately
fold
into
the
same
instruction
forearm.
They
don't
have
instructions
that
take
a
memory
encoding
since
they're
RISC
architecture.
What
the
JIT
understands
for
in
directions
it
has
to
load
it
into
register.
Before
calling
the.
N
B
They
could
but
there's
actually
different
instructions,
so
so
on
on
x86
for
non
vex
encoding,
there's
actually
not
different
instructions.
You
have
to
do
the
swapping
yourself
and
handling
of,
for
example,
mod
number,
but
for
her
arm
there
is,
and
so
it
would
be
more
trivial
to
directly
support
both
and
allow
the
containment
swapping,
which
we
already
have.
C
B
B
N
C
C
B
B
Yeah
they
take
I
short
or
and.
B
B
N
Of
multiply
and
adds
are
both
reflexive
operation,
so
it
doesn't
matter
which
one's
left
and
which
ones
right,
but
four
divided
and
subtracted.
It
does
matter
and
live
in,
aiming
them
from
the
operation
like
left
and
right
makes
sense,
if
you
think
about
it
as
the
in
fix
operation
that
we
probably
all
think
of,
but
like
this
one
specifically
called
out,
it
makes
more
sense
when
you
get
into
something
like
give
REM
when
we
called
them
like
value,
1
value,
2
and
out
value
3.
N
G
G
N
B
B
H
G
B
Infinity
all
right
so
there's
one
factor:
128
load,
vector,
64,
same
general
premise
as
or
that's
for
how
we
expose
it
for
x86.
They
just
take
in
a
byte
car
and
return
with
it.
There's
still
people
requesting,
we
add
overloads.
That
also
take
a
raft.
We've
previously
said,
that's
confusing,
and
it's
probably
not
worth
the
effort
just
going
to
call
out
again.
People
are
continuing
to
raise
that
request.
Why.
N
B
That
way,
we
can
return
a
type
without
people
needing
to
cast,
and
at
least
on
x86
there's
different
instructions
depending
on
the
input
operand
and
the
pipeline
can
actually
treat
them
differently
because
it
will
initially
say
this
is
likely
going
to
go
down.
But,
like
floating
point
pot,
next
versus
going
to
go
down
the
integer
pipeline
arm,
it's
just
the
same
instruction,
but
they
also
have
a
different
encoding
for
some
of
them
and.
N
B
B
Before
we
move
off
load
vector,
there's
a
meta
point
here
to
touch
on
briefly
in
that,
though,
this
is
mapped
to
load
single
one
element
structure
to
one
lane
of
one
register.
There
is
also
LD
two
three
and
four
which
allow
you
to
load
a
single
value
and
duplicate
it
to
multiple
consecutive
registers.
So
it
essentially
lets
you
load
and
duplicate
a
value
to,
for
example,
a
matrix
4x4.
B
T
Allocator
to
add
support
for
consecutive
registers
right
now,
there's
a
there's,
a
really
hacky
implementation
of
the
support
form
of
long's
no
different
for
dustry
doubles
on
arm
3d
to
where
it
has
two
reserved
sequential
float
registers
to
represent
a
double
and
it
it
would
be
disastrous
to
try
to
extend
that
to
four
so
I
mean
it
wouldn't
be
a
bad
thing
to
actually
you
know
be
able
to
toss
that
out
and
redo
it,
but
that's
what
it
would
require
to
be
able
to
do.
Four
consecutive
registers.
N
B
P
B
H
B
O
B
Scalar
vector
128,
which
is
not
part
of
this
proposal
yet
which
takes
the
white
star,
only
reads:
a
byte
and
only
loads
it
to
the
lowest
element.
There's
also
broadcast
api's,
which
will
read
a
sync
which
will
take
a
single
value
and
then
broadcast
it,
but
those
ones
aren't
taking
a
byte
star.
They
take
it
T
directly.
B
B
But
the
common
use
cases
you're
going
to
have,
for
example,
an
array
of
bytes,
so
you're
going
to
have
a
white
star
and
you
don't
necessarily
want
to
do
the
cast
yeah
and
that
also
then
ties
the
language
that
the
usage
to
c-sharp
8,
which
at
the
time
it
wasn't
clear
that
that
was
going
to
be
the
case.
But
now
we've
said
c-sharp
8
requires
or
3.
C
B
B
C
C
If
they
know
that
you
deal
with
that,
well,
it's
the
pants
look
yeah.
The
reason
I
was
asking
is
because
it's
it
has
the
same
name:
I
have
something
on
x86,
which
does
not
exhibit
that
growing
behavior,
so
I
just
want
to
are
separating
again.
I
might
worry.
I
know
this
is
all,
but
I
am
trying
to
have
like
some
are.
O
B
B
B
B
Right
so
there's
there's
max
here
and
men
and
they
they
work
exactly
like
you
would
expect
for
floating-point.
This
overload
propagates,
not
a
number.
They
have
an
explicit
instruction
for
the
non
propagating
version
which
I
don't
have
here
yet,
which
would
likely
be
called
max
number
which
matches
both
their
name
and
the
name
used
by
the
I
Triple
E
floating
point
spec
and
for
which
I've
got
that
proposal
to
first
to
expose
on
the
math
class
and.
B
B
B
B
C
C
B
C
B
B
H
O
O
B
C
B
G
C
B
C
N
H
B
H
B
C
There
are
some
helper
api's
already,
for
example,
Tanner
had
mentioned
earlier
operations,
dot
pop
count,
which,
if
an
intrinsic
is
available,
it
will
use
that,
otherwise
it
evolves
back
to
software.
Okay,
then,
the
number
of
instructions
that
we've
kind
of
created
such
abstractions
for
is
it
drop
in
the
bucket
compared
to
the
total
number
of
Shaker
actions.
B
But
there
is
there
is
about
as
before,
and
the
current
expectation
for
these
are
that
every
one
of
these
is
directly
hardware-accelerated
and
corresponds
to
essentially
one
instruction
and
that
if
people
want
additional
helpers
or
stuff
like,
for
example,
there
was
a
Twitter
thread
this
morning
on
whether
or
not
we
could
expose
a
wrapper
library
that
uses
the
C++
names
and
maps
them
to
the
c-sharp
names.
And
we
wouldn't
expose
those
here.
B
B
Also
because
it
doesn't
need
to
be
bloating
core
lib,
it
can
be
anywhere.
C
B
Yes,
because
source
was
confusing,
because
it
is
necessarily
the
wrong
thing
and
these
ones
are
not
called
store.
Vector
128,
for
example,
because
overload
resolution
allows
you
to
differentiate,
vector,
120
and
vector
60
or
worse,
but
the
load
cases,
then
that
matches
what
was
done
of
Exeter's
right
and
we.
N
B
N
B
C
B
N
K
B
Good
yeah
and
then
armed
64,
so
there's
a
abs
for
double
and
you
long
a
bun,
long,
yeah,
so
double
and
long
return.
A
few
long,
there's
AB
scaler
for
long
return
along
there's,
vectorized
ad
for
double
equality.
After
as
equality,
comparisons
for
double
long
and
you
long
and
then
a
64-bit
compare
quality.
This
one
might
actually
I
I.
Think
it's
supposed
to
be
called,
compare
equals
Taylor,
I!
Think
there's
a
separate
encoding
for
it.
B
H
C
N
A
J
L
C
B
B
L
B
H
B
B
Because
so,
if
you
scroll
down
just
a
little
bit,
there's
those
two
issues
at
the
bottom,
two
six,
five,
eight
one
and
four
to
176,
which
we're
not
going
to
be
able
to
get
through
today.
But
those
are
the
API
proposals
that
went
up
that
I
weren't
able
one
of
them
went
up
over
the
weekend
and
so
I
wasn't
able
to
get
it
into
this
list.
Yet
if.
G
G
K
N
B
Absolutely
difference
in
accumulate
is
the
name
of
the
underlying
instrument
yeah,
so
that
I
call
it
yeah
whatever
right.
Will
we
talk
about
that?
Yes,
we're
probably
going
to
need
at
least
well,
probably
two
more
meetings
or
the
api's
that
I'm
aware
of
right
now
and
probably
another
one
after
that
for
other
things
and.
B
I
think
so
I
already
talked
to
mo
and
we
had
determined
that
we
shouldn't
block
implementing
the
intrinsics
based
on
API
review,
having
gone
through
or
but
we
are
required
to
have
reviewed
any
api's
that
you
know
before
we
ship
until
we
start
really
soon
and
once
the
repos
are
merged,
then
it
will
be
much
more
sane
to
be
able
to
add
intrinsic
than
let
them
up
all
right.
Then.