.Net Foundation Design Reviews, 25 Jun 2020

Previous Meeting Next Meeting

⏯

youtube image

►

From YouTube: GitHub Quick Reviews

Description

00:00:00 - Approved: Add empty X64/Arm64 nested classes to some System.Runtime.Intrinsics https://github.com/dotnet/runtime/issues/34587#issuecomment-649714324
00:28:18 - Approved: Add System.Numerics.Half 16 bit floating point number conforming to IEEE 754:2008 binary16 https://github.com/dotnet/runtime/issues/936
00:44:11 - Approved: [Arm64] Store Pair of SIMD&FP registers https://github.com/dotnet/runtime/issues/33532#issuecomment-649724378
00:47:33 - Approved: ARM Doubling Multiply intrinsics https://github.com/dotnet/runtime/issues/36696#issuecomment-649730379
01:03:48 - Approved: Remaining ARM Intrinsics https://github.com/dotnet/runtime/issues/37014#issuecomment-649746313
01:35:04 - Approved: [Arm64] ASIMD InsertScalar https://github.com/dotnet/runtime/issues/38137#issuecomment-649751957
01:47:53 - Approved: [Arm64] SIMD dot product https://github.com/dotnet/runtime/issues/37169#issuecomment-649754359
01:52:24 - Approved: Allow creating more cryptographic objects from ReadOnlySpan(byte) https://github.com/dotnet/runtime/issues/38348#issuecomment-649759447
02:03:27 - Approved: Implement CachedBitmap functionality in System.Drawing https://github.com/dotnet/runtime/issues/36105#issuecomment-649761495

A

Practice math, alright,.

B

Are we ready yep.

C

No, your life, okay,.

B

No, so we reviewed this issue previously and as a summary, the issue is basically, if you had, for example, ARM based arm 64 as a nested class, but you didn't also have sha1 arm. 64 is a nested class. You could get into a weird scenario where sha-1 dot is supported, would return false, but sha-1 arm 64 is supported, would return true, because the sha-1 de arm 64 would resolve down to ARM based arm 64.

B

We had at the last review meeting we had said we would expose the arm 64 class. We would give no inheritance, no is supported check and we would mark it editor browsable. Never, however, this represents an issue for classes such as sse3, where you have SSE 2, dot, X 64 and you have SSE for 1 dot, X 64, but you don't currently have them on sse3 and ssse3, which exists in between those in the hierarchy and so in order for, for the rules main to be consistent.

B

When you've got that gap in the hierarchy, you really need to expose the X 64 class with the inheritance and the proper support or check at every level. Even if they're, not exposing any new instructions,.

C

So the quite is me thinking.

C

So, do you have a particular proposal in mind or preference that the.

B

Proposal is rather than having them edit of razzle, never with no inheritance and no is supported. We just matched the behavior that already exists, for example with avx2, which does have to have one, because it exposed new members where we have inheritance. We have, in his supporter check and it's browsable.

D

But I mean like we could do that, but the option of having the the class that you can't do anything with in the middle tells you that you've written code that makes no sense.

D

So, as do we want, do we want nonsense code to work or do we want nonsense code to fail to compile, and then you fix it to the code. You meant it's.

B

Already a case that you can write the same nonsense code today because, for example, since a B X. So since but.

E

We're fixing that.

B

No, no, no! No, we there's! You can't fix the thing. That's already broken in the sense that you can already today do. For example, a B x2 is supported and if it's false call a B, x2 dot square root and it will work at runtime, because square root actually resolves down to the SSE method.

D

Right and we can't stop that from from working, we, we can't tell you there that you're using a feature that I have very mixed feelings about what the language of you're calling a static member off there off a derive type instead of off the type it's declared on, but the if you're, if you're calling that is supported on a place that we don't have unique up codes, then it's probably not what you meant so I mean like. We can certainly do either I'm just curious.

D

Why you're moving from make the compile fail to make the compile succeed, as if the same as if we hadn't defined it, but we can put it in the future because.

B

When we originally reviewed this, the only things we really looked at were essentially leaf classes where they didn't have anything else inheriting from them. The issue comes in when you have, for example, sse3 which doesn't expose any unique 64-bit instructions, but it exists between SSE, 2 and SSE 4 1, which both do because then you get into a scenario where you can do: SSE 4, 1, X, 64 and access the SSE, 2 and x 64 instructions, but you can't do the same for sse3, even though previously you could, and it would work and work correctly.

B

D

So you're solving.

D

Different weird problems, but making it more consistent. Yes,.

B

D

So seems reasonable, there's still a question of while it's there, just as a placeholder EB, never still seems reasonable just to take it out of intellisense so that when you're writing you don't really look for special arm 64 things once you've written sha-1 for example. But if so you.

B

Want to say it.

D

Provides no value there, because if you were at a more derived type it they would show up anyway, then that's fine too yeah.

B

And that's basically the issue: is it the what we originally decided on works great for if you have just a leaf class like sha-1, with nothing else inheriting from it, but once you get into it's, not a leaf class, you get into weird behavior with how it works and how people may already be using it in code. So.

C

Basically, that means the the general pattern that we then basic prescribe is you would say if you have an inheritance hierarchy, you have to also inherit all the nested types right, which is.

B

What we've already been doing and.

C

So for sha-1, the original proposal was we do that as well and let me say.

C

We just say shall one is supported.

C

Why would we do that? Don't.

B

Know so the the that's, what the original proposal was and I'm saying we we just do the appropriate check for.

B

Sha-1 is supported or for sha-1 is supported and we're on a 64-bit platform. I.

C

See, okay, that makes sense to me because then we would also say: if we ever have to add arm 64 specific sha-1 instructions, then you know the check, wouldn't change.

C

Yeah that makes sense to me. It still knows that the most future-proof way of doing it.

C

Yeah, this is a kind of grid with Jeremy, like we kind of try to be clever here and then every time you do this, it ends up being coming back. Yeah yeah.

D

I wonder if, if it would be valuable, like I know that there's the general problem of people being confused when they're calling static methods off of derived types but I wonder if, for the entire intrinsics type tree, if it's worth having an analyzer, that is just like. No don't do this, like you're, just you're, going to add so much more confusion to your world than you want. Don't do this well.

C

I mean for usability. We clearly made that part of the design, though right, because the idea is, if you only care about you know, let's say sse3, you don't really care about supporting SSE, 2 and SSE 1 with that warning now. I have to basically also ah sse2 and sse one differently, because I need to call them on the particular API is right versus booth inheritance. You only check for sse3, and then you call everything as.

D

C

All the way down right.

D

Sure I mean I I, don't know that we have an analyzer, that's guarding the calls behind in his supported check, which would be the thing that would need to be taught about that.

C

But yeah I mean that was the idea, but we said like if you, if you call basically, you can call everything off of sse3, assuming your check for sse3 is supported, but, as is if we support it, true implies that sse2 supported also returned true and I see once we also applied that it's rule, because it's because of the heavens hierarchy right, fair enough, so yeah I mean like we don't have that, but I think that's. That was why we went with inheritance in the first place, but otherwise he wouldn't have done any inheritance.

C

We would have just them all defined them as individual static types, and that would have been that's what we tried originally. But there was a pain in the ass to write code in.

F

C

I agree with you like me: we it does tend to create these witnesses that we didn't really think through, but I think I. Think if we just say: okay, the nested types mirror that it's probably not too bad. It just means also, if we ever add an S to type to a type that is derived from you may have to add the same type to like 12 other times right.

C

So that's I'm wondering if we should make our lives easier and actually byte analyzers for ourselves to make sure that we make these things consistent, because we will probably forget that.

D

Seems reasonable, yeah III think that if we're defining the is supported uniquely on all the you know, 64 variants that they should do the the pointer size check, because if you specifically ask for the 64-bit version being supported and you're on a 32-bit processor, it feels like it should not say true.

B

Sorry, could you repeat that on.

D

The on the code- snippet, that's in the proposal. It says you know the Shah that arm 64 is supported, his sha-1 is supported and then with an optional check of and the ends in pitter sizes, 8 I think we should do the optional check so that on 32.

E

D

Doesn't return true, forearm 64? Yes, right.

B

It's not optional, because arm 64 is supported has to imply that our base arm 64 is supported great.

D

Yeah, so really, it seems like sha-1 that arm 64 is supported, is sha-1 that is supported and base. That is supported.

B

Right effectively, which is, it won't, actually be implemented as that it will be implemented differently in the JIT, but that's effectively what it does.

C

Okay, so let me copy and paste the thing that I have right now. I would then remove that.

D

Yeah I assume that this is actually needing to go to something like 12 places already yeah.

B

It's going to be on basically anything that doesn't expose arm 64x64 today, yeah.

D

E

Maybe I should point this out here seems.

D

C

Type in a different monitor it's hard, so we need to it's already approved okay, so they'll, never just close! This.

C

And then I have to do something weird.

C

Otherwise my notes will not pick it up. I need some sort of change in the industry. This otherwise.

C

Alright, so here we go. Second one store pair of Cindy and function, wedding registers.

F

Can I take a look into the chat, much.

C

As soon as I find this issue.

B

Do you wanna give the summary of this one.

F

F

Basically, when we approved with a guy for shift left and in shorten change, we decided to go with shift left, logical and insured and I believe shift right, logical in short.

F

But for me it doesn't make sense, because those are neither logical nor arithmetic shift, because the B's that got emptied by shifting the right they filled with the wireless from another author and so I, suggested just to name those. The same way. The underlying construction named by Shree flattens earth and shift right and insured and same for Scylla.

D

I mean if the logical or arithmetic is determined by another parameter, then I agree it shouldn't be in the name. It's.

B

Not that it's logical versus arithmetic here in this case it's essentially it's essentially a logical right shift where the upper bits are then taken from another operand.

B

So so imagine if you, if you write shifted by two, the top two bits would become 0 and then you'd extract the top 2 bits from the other parameter and insert them there, whether they're, 1 or 0,.

D

Yeah I mean it yeah, so if it's essentially just shifting across operands, then I mean we could throwing the word across, but that I just made it up. So no one would understand it if yeah. So if the whole, if the thing is that this is not a simple shift which could be described as logical or arithmetic and removing that word and just saying it's shift left and insert, and you need to understand that it shifts from one operand into another, then that seems reasonable to me.

F

Yeah and just for clarification, I sent a screenshot of the arm menu in the child.

C

We I don't have strong opinions, but it makes sense. I mean like that's the like. We try to be explicit with the naming convention. I mean to me, and I am NOT an expert in this, but to me the overarching goal would be whatever makes sense, for this is a right. Whatever naming we think makes the most sense. I would not try to align it across ASAS, because we said many times. That's you know an attempt in futility anyway.

C

So I would just shoot for consistency within that, and if you believe that the naming that ego proposes does then then I would go for that.

C

Okay, one at a time, please not everybody.

D

Yeah, you know I think it makes sense to drop the if we have instructions that are, you know the whatever the element. Why like, if it's an element-wise right, logical shift where you know you pass in a vector and in an int like that, one should have the word logical, because that's what it's doing, but this one is complicated and we can't it's neither logical nor arithmetic, so removing that word instead of inventing one see make sense to me.

D

So yeah it is, it is just shift right and insert and it because it it's masking out all the bits that would have been arithmetic or logical and then pulling them from another source. So it's neither of those. So don't you say the name make sense.

C

Alrighty then so I guess that's the decision. We're making I have no way to record it easily here inside the question, but as long as tenor- and you go okay with that, then that's what it is. Okay,.

B

D

So yeah just to be for clarity, that's these shift and inserts where it's, neither logical or arithmetic, makes sense to not have the term, but if it is, if it's not a complicated shift like this, one I do still think that the logical versus arithmetic provides clarity to the caller and.

F

Logical ones, logic, expenses, okay,.

D

So just making sure we're only talking about these and insert.

F

D

D

B

And then I think we can move to store pair. Then.

D

Did we lose your emo no.

C

I muted, talking to myself, apparently yes, that make sense to me.

C

Turns out having a fancy mic does not protect you from being dumb, so should I record the summer, or do we just leave it, as is because it's a bit weird in a question. I.

B

Think we I think we could just put it as a comment at the end of the comment chain here.

E

C

Love to comment there, you go. No, that's not the one. Alright.

C

Okay, just hit R on this one.

C

I just make my life slightly easier.

F

C

Then let's talk about Cindy and FP registers, which I assume machines which assuming floating-point not function pointer.

B

So this is effectively just a set of API switch stores, a pair of vector, 64 or vector 128 registers to be given address.

B

It's supported for I believe all 10, primitive types.

B

B

Your this one's, not the meta question on related to tuples, correct, that's load right.

F

Yes and I believe this one can be supported on are implicitly as well: yeah SDM abstraction.

B

And then the other note is there's non-temporal versions, non-temporal, meaning the same thing on x86 in that it does not go through the cache and it goes directly to memory. It's.

C

A first disappearance cater. What is the difference between the two.

B

So so pair stores both registers sequentially, whereas pair scalar and I, made a comment that maybe it might be better named as scalar pair. It takes the lowest element from each vector in stores those sequentially.

B

So rather than writing, for example, 256 bits. It writes to floats where the two floats come from the element 0 of each vector give it.

E

So it's zip yeah.

C

But one element, though yeah.

C

That makes sense, I mean yeah, whether you call it store Pierre, scaler or store scaler pair, probably wouldn't make a difference to me. I wouldn't be able to explain it either way.

C

D

The other, like instruction.

A

Call it because.

C

I ring the names is, what does STP send for their store they're? Also up here? Yes, yeah, yeah, yeah, I, guess either. One is good.

D

Yeah either scalar pair pair scalar, whichever one you feel happier about I, don't.

B

Have a strong preference I just like how store scalar pair sounds over store pair scalar yeah.

D

I mean I, guess it's: if everything that is a scalar version of the vector thing has scalar as a suffix, then not all of them do just most of them. Okay, because if this is gonna be the first in fixed one, then you need to feel really happy about it. If we're already all over the place, then whatever there's.

B

A few like comparisons where we've reordered scalar, because it made it more clear as to what the operation was doing.

D

What's what's temporal mean or temporal.

B

D

B

Feel pronouncing it. Non-Temporal means that it writes directly to memory. It does not go through the cache.

G

Right, the point of the name means that it's non temporal and that I don't expect to use this soon so non timely. Oh.

A

B

Main use case for it is your writing large amounts of memory such that you're, going to blow the cache over and over, in which case, avoiding writing that the cache actually causes performance to increase.

C

Come on chef, so normally it will commit it to both the cache and the actual memory right, and this work.

A

C

C

D

Assume those respect words.

A

D

Non-Temporal yeah.

B

That's suspect word and it's the same one used by x86.

A

C

Why do we have more temporal one non-temporal ones that we have any of anything else? Are there more overloads?

C

Was it just no I guess it's the same as store buying right, yeah.

C

So you want to swap scaler and pair it.

B

That was my suggestion, but if I I don't feel particularly strongly so if Carol or Igor Bruce or anyone else has an opinion, I'm happy to use either will.

H

Be hard to find the scalar pair if they're not postfix, so.

C

The way and tell yourself.

H

I, don't Ellison.

C

Yeah, like it doesn't do like partial matching right. So if you type stores store scalar, it will no longer show you store pair, but if you say store pair I will show you both store pair and store pair scalar right, because it was a prefix thing and if you just type scalar, it will also show your store pair scalar right. So it makes postfix in fix and suffix matches, but it will not.

C

You know, take the words apart and then do partial matching or something right, so I think it's fine I think either way will not make intelligence harder. The only thing to consider is this general sorting when you go to the docs pages. If you say you know store pair scaler, it will basically come directly after store pair. If you say, store scale up here then well, where were the swords right.

H

So also the the man, the architecture manual, doesn't use the term store, scaler pair or secure pair scaler anywhere right. That's something! We've made up yeah.

F

We need to somehow describe that. We only start storing the lower part of 64-bit register because store peer instruction can operate on 32-bit or 64-bit agent.

B

Well and it's the the instruction manual does use the term scaler, but it's generally a parenthesized postfix. So, for example, we store pair parenthesis, scaler close parenthesis or shift right and insert by element in parenthesis.

B

Also ammo, just as a note, modern intellisense does separate the words and show both scalar pair and pair scaler. If you type store scalar really.

C

B

I think that was introduced with the Intel Akkad changes. Oh.

C

I guess I'm not using vsi's I.

C

Stand corrected then I mean to me. This wording is still one thing to consider, though, because you, you know.

A

C

Is still something people as they explore until they sense or if they read the dogs right so like you generally want to make sure the things sort in a somewhat sane way, but I think either way. Here's fine cuz, they all like store related. So.

C

So, unless I hear strong thing, I will just leave it as it is because it's easier for me.

C

C

Cool that I think we are almost done so then talked about the non-temporal ones.

C

F

Let's go to food.

F

It should be should be stored, no temporal wear or stop Vietnam temporal I.

C

Mean before we said, we want to have it in Orono operations. Right to me, it seems like it's kind of sensible to have the non-temporal. That's the very last thing, because the base adjust controls, whether you write it to the cache or not, and the first one is basically more talking about how you retrieve or store information right. So it seems more important than whether you hit the cache or not so I would.

D

C

At the end, the.

D

Instruction manual, for it even has it as a postfix: it's store pair of SIM D and FP registers, comma with non-temporal hint, so they they buried. It is the suffix in their guide, but an infix in their assembly language. So obviously they had the same debate. Minh decided to go both ways.

C

D

So yeah, if I'd say in fix or suffix whichever one we've done for existing instructions, I assumed it was a suffix and so but mo pasted.

C

Again, I don't have strong opinions suggested. You know, consistency with what we decided previously. It makes to me more sense to make it as a suffix right.

A

C

The scatter before that.

F

But now, if you look in the commutation and solve them by this name, then stop rare scaler will come after or peer from temporal. There.

C

Is true, I mean like that's dead stood outside, but I guess, that's kind of like the. It depends on how you want to reason about the instructions.

C

But if you, because there's multiple ways you can, you can organize them right whether they hit the cache or not whether they they are scalars or non scalars, and so like you, just have to pick one thing, because you can't make all things work right and I guess when you write code, it makes more sense to me that the very first thing you're looking for is basically how the instruction is.

C

Actually writing information to the memory, that's probably more important than whether it hits the cache or not, because if you don't find an instruction that writes it out in layout that you want then well that hits the cache or not is not actually that relevant anymore. I.

B

Also think, with the way the docs group method overloads, it's not going to be too big of a concern, because it's not like you're gonna have to scroll through 20 to find store pair and then store parent on temporal. It will just be, you know, store pair which links to the the group of 10 and then store parent on temporal, which links is a group of 10, so they'll be relatively localized and together.

I

C

All righty, then, let's move on to the next one.

B

So just a few doubling multiply intrinsics that were missed in a previous review.

B

It's the same name ordering that we have for the other ones, so doubling multiply saturate hi, doubling x, selected, scalar, saturate hi, doubling multi doubling, multiply saturate hi scalar and then I've got a to do note there for doubling x, selected, scalar, saturate or yeah saturated hi scalar, namely because I couldn't I wasn't too sure about the names. But it's the same general convention is the above I.

F

Just don't think if any doubling in cases yet and great there. Those are the only marks.

B

F

Also for having the duration, the decoration that takes a path of the results we used add housing or attract housing and last time, I suggested to swap the order and just multiplied ugly sort of doubling notify that.

B

Makes sense to me, and also.

F

For having to used used, prefix and technically speaking, those also use and I'm wondering if we need to add tricks here.

B

Yeah, we should for consistency, I think.

C

So what was the first thing? You just said what he want to swap.

F

Multiply and doubling.

C

So you would say, multiply doubling saturate hi.

F

Yeah for fuse not the point of them, that's right thing.

D

A

That it starts.

D

With the multiply and fused multiply,.

F

D

That so that it sorts with multiply and fuse multiply, or just because it seems like.

F

D

The verb or or what.

F

Yeah multiply is your friend doubling it's basically description of how they don't multiply it.

E

F

Pattern for add howling.

F

D

If we already have a pattern, then we should follow the pattern where.

F

We can change the pattern and just growth used and like swap calling I.

F

B

I think the fuse just important because it qualifies that you are getting a full result. So if you do FF plus 1, for example, you're going to get 100 as an intermediate, that's going to be used as part of the next computation, which is the doubling rather than say overflowing to zero and doubling back to zero.

F

You know what I check the manual and arrow sets used for either calling or doubling stand cycle right.

B

But in a pasture of you around the multiply add we determined we should prefix with use to help clarify the overflow behavior.

F

B

The difference here is it: it does. A non-saturated multiply a non-saturated doubling, then it adds and then it saturates.

B

Sorry it it takes, the high half then adds then saturates. So the ad is the thing that does the saturation.

C

I mean that make sense me.

F

And for rounded on having only the used, multiplied, doubling rounded, be consistent with used, add rounded, having.

B

Yes thinks branded.

F

C

C

So the rounding.

C

I cannae to my here's. What I will do I will just copy and paste the stuff over to the text box and we can review it there because I think the way it's written here is not very Amanda before easy overview.

D

Yeah I'm reading the manual I can't tell when the rounding occurs.

C

B

You you have, you have to scroll down to the the well.

D

In usage, it says the results are rounded, but it, but the like this instruction multiplies the values of corresponding elements of the two source. Md and FP registers. Comma doubles the results, comma places at the area. Then the results are rounded so was the results of the multiplier. Was the result of the double.

F

B

Have to scroll down to the operation for all in codings part, which shows that it's two times element 1 times element 2 plus round. Const is a intermediate product that is more precise than the inputs. And then you take the upper half of that and do a sign saturation.

F

D

The routing is, after the doubling.

E

F

In the same time, if it's multiplied add or multiply subtract, it happens the same or in the same, how to say precedence. Basically, you add doubling doubling product with round constant and we hadn't or mini end and then take the other half and sign very situated.

F

This is a picture. Oh.

D

I'm, just making sure we're consistent we're putting the the words in the order that you would observe the side effects with parentheses, so yeah.

E

That's what we said you wanna do.

F

D

And apparently you're, looking at a better version of the manual than I am tenor because I don't have one with a formula in there. You.

B

Have to scroll pretty far down to find it I mean.

D

Like I've hit the bottom of page, it's a pretty yeah. That's.

B

Cuz it's on the second page.

B

But yeah, so the the rounding is effectively part of the doubling operation. It's basically you double and then you add the round constant, so I think rounded doubling makes sense, I think that's what Igor suggested mmm-hmm okay.

D

Because it's describing the doubling instead of sure, okay.

F

But to summarize is going to be fused multiplied, doubling used, multiplied around.

F

C

So I'll be there in a sec, so I need to I'm almost done with outlining the parameters all right.

C

Let me paste this guy in here. Is this the right one here, yeah.

C

So we said multiplying and then what did we say about the rounding? What does the running go.

B

Multiply rounded doubling.

C

Okay multiply rounded um Ling.

C

Let me swap multiply and doubling again.

F

So for widening have a question: should lower go the last part of the method name or it should be after widening, it can be multiplied doubling whitening for saturate or multiplied doubling widening saturate, lower.

F

Because it gets in the past, we use lower on the the last part of the method. Name, I never had a begin award.

B

Could you type out the two, the two names.

C

Yeah I'm sympathetic, I cannot keep the sequence that long in my head by the time you spoke it out. I forgot all. You started.

F

F

B

The widening, so it is 2 times, element 1 times, element, 2 and saturates. The wide end result so it widens and then saturates.

F

Yes, but the question is: if lower should be your last one name and given that the origin, only there probably should be the worst one, otherwise we'll break our yeah.

J

I think that makes sense.

F

Because, basically lower said, we are getting your appearance either from the lowest half or the upper one and.

F

It probably should be closer to the actual order and.

F

The parentheses.

C

So then, we're going with multiply doubling widening saturated, lower.

F

C

Right so then, let me.

F

And she feels multiply.

D

D

It's obviously just needed more words.

B

It's it's worth noting that, for.

B

In between the two groups that were just talked about, there's the the diffused operations, the fused operations, in particular, aren't 8.1 or 8.0, and so they can't be on the advanced in the class they're, actually 8.1 and required by an eight point. One implementation, the official flag bit is just called RDM.

F

You're thinking about stage right around the multiplayer.

F

B

So, based on our conventions so far, it would be under a new class called public abstract class RDM, which inherits from advanced empty.

B

They like dot product, our would be a if we happen to have time.

F

The car mania, starting with.

B

It's just s: QR d, ml, aah and SH for by by a vector, okay,.

J

C

Mean some of the method names do sound a bit like a Monty Python sketch I have to say.

C

Multiply doubling accept subtract, widening lower by selecting scalar saturated. It's quite a description.

C

Yeah I think you can I mean we don't have to do all the instructions yet right. We can still add nested types later right.

B

Well, in this case, it wouldn't be a nested class. It would be a new top-level class called artyom. Oh I, see I, see okay, fair.

C

F

B

In the same way that SSE 2 derives from SSE.

C

So the this is effect any of the existing methods here, or is this something that you just.

B

C

B

No, it impacts two groups of methods in here, so specifically, the fused methods.

J

B

They're only fused when.

B

Sorry sorry I mean fused, as in also doing the addition, so the the and accumulate or multiply, add rather and multiply subtract well.

F

I think it's only place around it multiply it around multiply subtract because.

H

B

F

B

C

So I think you lost me, so the one that have add in the name so, for example, multiply rounded doubling at saturated high those, the one that you would put in there. The.

B

Ones that are both rounded and add or rounded and subtract. Alright.

C

So this is I, see: okay, I think I got it. So this is like.

C

Basically, line 42 278, which probably doesn't help you, because you don't have line number especially yeah and the top level time will be called RDM yep.

B

As that see, if that's the official flag bit, that they use okay,.

C

Hold on public abstract class RDM, would it inherit from advances in d yep.

F

All right how different looks like because what I see with the just checks for a print one. If.

B

You look at the architectural features added by arm the 8.1.

B

Enlists the knowledge of screen shot up for convenience. It.

A

B

The the actual CPU ID bit that it checks so.

F

It's a separate bit for these particular impression so.

C

F

To check 8.1 and done well.

B

There's an explicit bit but as it states it's mandatory for the 8.1.

F

And using our the instance here for virtually.

B

That that's the flag name, it stands for rounded double multiply.

F

Since Excel the features month, battery and 821, but they still can be implemented in just Larsson, really tried, and we need to check for our DM flag. Instead of checking for in point one right.

B

We've said that we explicitly check the flag even when they feature as mandatory. For example, sse sse2 are mandatory for 64-bit x86 CPUs, but we still explicitly check and expose them under the corresponding flag name.

F

In my manual, the teacher told our DMA I can send you my screen. So even though the flux RDM show the name, the class of DMA instead.

B

I'd, imagine that's just a typo there.

F

There, where ya.

B

Bet it says our DMA.

F

B

If you actually click on the link and go to the B ID, a a 64 is a r0 e l1 register. It shows already in there as well.

F

F

Well, the website also sub are the main procedure. I.

B

Think that's their public name for it.

F

B

The CPU flag is still our DM, which is what we've gone with for everything else. So far was.

A

B

This, the CPU flag, name to avoid ambiguities between things like, for example, something being called neon in in their marketing name, but using some different moniker, such as advanced MD internally and their cpuid bits.

F

Okay, so I'm fine, just wondering quiet, I,.

B

Think it's the same for dot product, for example, the official name is dot prod, but the official cpuid bit is called DP.

F

Yeah but, for example, GCC compiler: they used this differently if they have different identifiers for all this eyes extension and for our Gmail it with our DMA, not RDM,.

F

C

So what has been done in with the name then.

B

My preference is for already and because it matches what the CPU register uses I.

C

Mean the question is: is that is that something I can look up and find a hit, or is this something I have to like dig for half an hour.

F

Well, if you, google, our GMA's I, did right now. You'll find multiple pages.

C

Well, that's the.

F

Other problem, though,.

C

Like I mean, do I find too much it's like like. Basically when I, when I search for our DM or whatever you're just said, I couldn't quite hear it like. How specific is it like is it? Is it relevant to this like I, mean sse2, for example, very clearly relevant right versus this one seems more, like you kind of have to defeat the fine print as far as I understand what Tennyson well.

B

If you search for you get you get relevant, hits for a few search, RDM or RDMA. Okay, and it honestly also depends on which version of the menu you're looking at. If, if I look at several versions across three years here, I get different results for RTM versus 8.1 CMD versus RDMA yeah.

C

Which does go over the latest? One is because that's good the name that they are going well.

B

The CPU bit is the thing that's consistent across all of them. It's always our DM is the CPU bit, which is what I was saying earlier on. They might have a marketing name like neon or something like that. But if we match the CPU ID flag, then we won't have any ambiguity. Yeah.

C

I can't get behind that I mean marketing, does change its name, it's mind and then the name so yeah, let's go of RDM. Then it seems like the most reasonable thing.

C

Unless somebody has super strong objections to that.

C

Going going gone all right.

C

So did we skip anything or is that is that all we have I think.

B

That's everything for that issue now so.

C

And the one overload the text right and byte index: does that name the way we usually name them? Didn't we usually have a selected index enter in the name? No.

B

We used right index to clarify which one was coming from.

C

C

C

Right then, this is the one we have actually I did was going in.

C

Almost readable now.

C

All right this is to do mark, as I assume is something you want to submit later, which one's.

B

C

To do markers you have in here.

B

Those ones I call that at the beginning, they're they're, essentially the same as the by selected scalar. It's just they're there by selected scalar against a scalar. You.

C

Know what I'm asking is like? Are you submitting them later as a separate issue, or what is the plan with those.

F

Thank you, I wasn't interested then I can just employ. This is a button previous similar methods. I can just repeat this pattern here.

C

Yeah I can go right.

B

Yeah they should be implemented as part of the complete work for down at five, and so if we can just say that that the name is consistent, then we can just implement them. Yeah.

C

They're works for me.

C

Let me just call this out.

C

C

Cool then this is it for this one here.

I

C

Me close the tab, so we keep track on what we have done.

B

Okay, so the first ones here are ones that are.

B

Need just a little bit of discussion and context.

B

These ones are essentially the the counterparts to store pair. However, given that it's returning a pair of vectors.

B

We we obviously can't we have to return all at once sin, whereas with store, we can of course path just passed them in as multiple separate parameters. For this we opted to use a value tuple, we didn't come up with names as I had not as a necessarily sure there are good names for them, other than necessarily item one item to value one value to it's a value tuple, because we don't think we need a strongly typed struct to contain them. Although we could potentially create one and I believe Carol has recently done.

B

Work in the JIT to make multi register returns. Work nicely with this particular pattern.

G

Right I'm still working on arguments but returns are doing pretty well.

F

At some point, we need to discuss load, multiple consecutive director, 64 or 128.

F

Like shall we, the shore will talk about not fear on a later point meaning, but shall we push out load vector 64? In case you find some nice solution for load multiple reactor 64 in the future, so you can just use same structure for the returning who Alec here and there the one of the proposal could be reactor 64 x2, which basically base pair of vector, 64, no vector 128, x2 I,.

B

Think that largely depends on whether Carol thinks that the case of sequential registers will need a special type versus being able to just make it work with tuples.

G

So I I think that the right way to do it the easiest way for the JIT to support it is tuples.

G

It they'll be tuples with a special requirement that you know it's going to take some work to get it to be supported, but from the perspective of the rest of the jet, you know the front end to the to the register. Allocator the tuple is the right way to go. I believe.

F

You know throw multiple consecutive registers right.

G

Right I mean this is sort of I believe the right way to support it is it's it's sort of conceptually the same. It returns multiple registers. It requires multiple registers. This is just an extra wrinkle that the register allocator has to ensure that they're consecutive and what I say just I I mean, and it's a lot of work for the register.

F

B

To clarify for everyone else, so load pair loads, a pair of load loads, two vectors from the given address and it returns it in two registers. But those registers can be essentially any register, there's other variants of load which were not doing for dotnet 5, which likewise can load to load 2 vectors from an address. But they are returned in two sequential registers, so register 1, followed by register 2 or register 2, followed by register 3. They can't be arbitrary registers and in that case it supports up to multiple.

J

B

And so it sounds, it sounds like tuples are the right way to go? It's just going to no matter what we do we'll just be working the register allocator to make happen. Sorry, Carol.

G

In the current state, it's easier for the jet to support it as a tuple because it doesn't have to like manufacture a type out of thin air. If there's some reason that an API using tuples would be considerably less desirable, that's something the register. I mean that's something that jet can do is is construct a fake. You know a fake tuple, but you know it would be more streamlined if it were already known. Struct type.

F

Just curious doesn't mean that if we use tuples for values of two registers, when we load, we don't have to go into the memory like into the stack, it can stay in registers and be enrichers the whole time. While we're working right.

G

Yes, so I actually have a draft PR that adds a register a to register, multiplied on x86 there's some issues with it and it's kind of at the bottom of my to-do list right now, because there's other high-priority things, but you know, there's definitely a proof of concept that it can be done and you can actually, you know, generate code that doesn't put it on the stack.

D

Yeah I think tuple is good for pair and it sounds like we'll need something more complicated when we want to deal with multiple.

F

B

If no one has any other comments about the load pair I think we can move on to the next ones, which are just below that.

F

So follow bears killer, he keeps a load for pairs killers and we said so fierce killer right. I.

D

Guess when, when I say that tuple seems good and I'll just confirm that you expect that the 99% case is someone's just going to use deconstruction to assign it to two distinct locals there, one. Actually, they won't care about the tuple right. That's my expectation, yeah!

D

That's what I expected based on the API, but just making sure.

D

So I'm go back to port.

B

Does anyone have a preference on the name just leaving them default, which would be item1 item2, naming them value one value two or naming them lower upper.

D

That'll see what we're talking about Oh for the names tuples yeah I.

D

Mean if lower and upper names from the spec, that sounds good.

B

They're they're not names from the spec. They just roughly match the concept of lower and upper that we use elsewhere. Yeah I.

F

Think because the use lower, we describe the lower part of their.

D

Well, the rule. Well, the guidelines say you know, name all your tuples in this case I. Don't think that there's any name. We can add that helps right. It's it's! This was the first one. This was the second one. They don't have semantic, meaning they're, just this one's first in this one. Second, so the default names are fine.

B

If we wanted consistency with store pair, they would be value 1 value 2, which is what we named the parameters for store pair. It.

D

C

So what did we do for link by the way? Does anybody remember I think because it's the same thing with zip I think we also said well the best name, I.

D

C

Item to it well,.

D

Zip we named it first.

F

D

Because that was the names of the parameters you pass into zip, so I.

C

Guess that makes sense yeah in this.

D

Case so so yeah I I can I agree with Tanner's most recent statement. If we name them value 1 and value 2 in store, then we should call them value, 1 and value 2 and load.

C

So they see you're saying that we should have a.

C

C

D

V's our capital right I mean.

C

Of course, making sure.

D

We didn't spend 10 hours in that meeting for nothing.

C

People still hate us for that. Just so you know.

C

And it's definitely item1 item2 or not like item zero and I. Didn't want to something like this.

D

Yeah default themes are item, 1 item 2.

C

Because they will be extremely bad if we just because the item 1 item, 2 brains, are also available of their 1 base in the 1 to zero base. Well, the other way around.

D

Value tuples, T, 1 and T 2 has item 1 and item 2. Okay,.

C

So do we change anything else is just the tuples.

B

Everything else was the same, just adding in the the names.

C

Okay- and let me comment on this.

B

And then, after the load pairs, there's.

B

We hadn't finished reviewing the the last half of be proposal. M, oh yeah, that's fine I mean the.

C

Problem is just if I paste the comment and has to be within 15 minutes of me approving it. Otherwise the tool doesn't pick it up.

I

But it will approve it, whether you're not going to reject it in.

B

The next ones are extract, narrowing saturate, lower and upper.

B

These all take a take in a type and return a.

B

Return the same type and then there's extract narrowing saturate unsigned lower, which takes in a sign type and returns an unsigned type.

F

Commented the law I believe extract. Narrowing iterate on science would correspond to ask lyrics to be an attraction probably type in the proposal.

B

Which one sorry, the.

F

Extract nearing saturate unsigned from water eaten, the dog should respond to ask. You XD um basically signed situation to unsigned right, yeah.

B

I might have those mixed up accident.

C

So it would what what you to be instead just.

F

B

Yeah, it's just the comment above the SQ x, tu in and UX or you qxt in the comments should be swamped.

C

C

C

Is anything we need to change our happy with the name? Then.

D

If I look at the names of these and my eyes gloss over, so it well.

C

But it's true for all the hot of intrinsic science. That's it like.

D

I can totally understand what reverse element. Bytes means. I can parse that sentence, but.

C

But can you explain what it does and would you be correct.

D

It changes in within each element. It changes little endian to big endian or.

B

Yeah so moving on to reverse atomic bites. Yes, that's what it does.

A

Good name good nip so.

B

The interesting part is the comments at the bottom, so Reb 16 naturally takes in short, you shorten short and it swaps the bytes on those. Likewise Reb 32 will take in a 32-bit element and swap the bytes on that. However, there's also variant that swaps, each 16-bit portion instead of each byte I, have no clue what to call that.

C

Well, reverse Elliman! You Schwartz.

B

We can't call it you short, it would have to be you int, 16, maybe sure.

B

And then likewise for Reb 64, there's bytes, you went 16s and you went 32 s. Then.

C

Yeah using the boule is a bit weird. In that context, I mean you could, but.

I

I guess that's the best using.

B

What, in that context, sorry yeah.

C

Using a plural name, there's a bit weird like you know: human 16 seems a bit weird, but I guess right.

B

That's the like bytes is very obvious what it's doing, but if you call it, you went 16 s and you're passing in a you long, it's kind of confusing yeah you.

C

Could also maybe just make the method name slightly longer right, instead of saying reverse element bye, we could say worse, element bye-bye and then you know reverse element by UN. 16 can call them.

F

B

Because the what word means is very contextual, based on a lot of scenarios like are might refer to a half word as 16-bit, but on Windows word is very clearly 16-bit, not 32-bit. What.

D

About actually.

B

On Windows, what.

D

About just using the bit count, so, instead of saying you know you int 16s, it's just like you know: reverse element, eight reverse element. Sixteen I.

C

Can live with that.

B

Yeah, that's not that's not terrible, it's not amazing, but given some of the other names, it's also not the the worst API we'd be exposing.

C

Yeah I think you lower you bar nobody.

C

Favorite API, for all times, is still WebSocket is application. Targeting for five slope, we don't build that I'm I'm, happy.

C

Yes, should we add them already, or is this just future proving at this point no.

B

No, these- these are ones that are part of the.net 5 work and we actually have explicit use cases for them, for example, with a.

B

System bit something a rather reverse in the reverse, bytes or whatever. No.

C

I'm not talking.

B

C

What I'm talking about the the 16 versions.

B

Those are also part of the same I. Just didn't good name suggestions for them.

C

I see so they see I would just copy paste and that so, basically, what we said is reverse element Aid right and then we would just copy paste it and every day everywhere. Sediment 16 right.

E

C

That works for me, I guess.

F

I guess we also need non advanced in the ocean because there is a RF 16, 32 and 64 instructions that operate on general-purpose registers.

B

For those ones, since their baseline instructions and since they're, essentially core instructions, it was determined that we didn't need to expose them as explicit.

B

Intrinsics, instead, we would just tell users just go use.

F

B

I think that's the.

F

Reverse element beat them.

F

B

That that's because our bit doesn't doesn't have a corresponding, essentially baseline, equivalent, where it's available.

A

B

All platforms and.

B

Things like that, they're.

F

Saying any corresponding bit converter method, the just nipped exposed on the reverse element bit and all other functionality can be skewed. Yes, we have it convertor right.

B

There there was a pretty lengthy discussion on some of the issues between yon and I, where I originally suggested. We should just expose the intrinsic anyways and he pushed back strongly on. We don't really need to do that and I finally caved in I.

D

Assume, there's no reverse element 16 for the short types.

B

Right, because that that would be a no all right.

D

I was trying to figure out your spacing, especially one CMO copy and pasted it so I think it's that the you had them in the 16 32 and 64-bit chunks, and so when we get to reverse element 16, we don't need the 16 bits and then is there a reverse element. 32.

B

Yes, for long and you long.

C

So what did I forgot all.

D

Right so you have three reverse element: eight blocks. Yes,.

C

D

Good now delete the first reverse element 16, because you're saying reverse 16-bit values 16 bit early, which makes no sense. Oh.

E

I see okay and then.

D

Copy the last reverse element 16 and paste it and make it reverse, sell them at 32 chunk.

E

D

3/8 to 16s and 1/32.

C

Yep that makes sense.

C

All righty, then this is it. That's.

B

That one and then there's just two issues left.

B

That one, that one should be three eight one, three, seven three.

C

This is this money hasn't done yet no.

B

There's one other we've not done yet that you don't seem to have open it's three. Eight 137.

B

Which is a really small one.

F

B

We just missed the insert scaler variants that took double long and you long.

C

Seems fine to me.

C

Unless I'm blaming.

D

If this is just an overload that we missed a you know a generic argument and seems fine.

F

D

F

I give the class name should be advancing, do not nothing dark or because below tomar suggests how it can be implemented on our method.

D

E

D

Been doing software fall backs.

F

Well, the whole packet will be.

F

B

This is just a case where it can be implemented with a single instruction on arm 32, but the the C++ intrinsics don't expose it like that, because they don't have a vectors. They don't have a double X, 1 type for arm 32, and so it was missed in the initial proposal. Okay,.

D

So put it in the class, it belongs in yeah.

I

C

So what does it mean? Then we put it out into advance Cindy or doesn't mean we put it in both I'm 64 and I'm 32. Just.

B

Advanced MD.

C

Just one or no.

B

All of them just just remove partial class arm 64 and it's correct.

E

C

Be careful what you have in your clipboard.

B

And then last issue for forearm intrinsics.

F

B

So the clasp is DP, which is the flag name for dot product, and it's.

C

Parallel to only assembly right.

B

It would inherit from advance somebody I believe, but.

C

It's the top level time I see me yeah.

B

And then the types are as given here so the first operand is the ad end. Then the left and then the right.

F

F

Just wanna note here that like if you can see the left and right are vector, 54, bytes and the result of a particular in so we need to dot product on 4x4 basis we take just for, and we left one nurse for in a second one. We to the product and the result in the first or 0 component of atom.

F

And we continue for the segment or elements in each like. Is it clear from the signature? What cannot happen here, or you can say, left a Drupal so forth, I.

C

Mean clears a very relative term here.

C

To me, it sets of the fact that magnet I'll show what a quadruplet is. Is that just for values.

F

Basically, like the reason why I selected I think I preferred another name, because right index parameter, he can can take values between 0 and and to exclusive. In this key, we can take left and multiplied by first for right elements or by second for head element.

F

We know how to specify that we can select them on the four elements, but not individual.

C

So basically the operation always performs was always 404 elements. Any basic, just select the start index of the first element, and then the operation takes the next four.

F

Yeah, but you only can see like the value or the index is based on assumption that you take you to be selecting four elements so basically like. If it's going to be byte offset, then it will be zero or 32 or 64 right.

F

But since we specifying first element index, it's actually not first element in it. It's a 4-peat or 8 bits for element, English.

C

So you lost me there, like what does that mean? Thank you. Thank.

F

C

Saying so, I thought what you do. Is you basically say well, the operation takes four elements and right.

A

C

Index is basically the first one and then then subsequent next three items are also used. That's how I read it yeah.

F

But you can't select first, second jordan course you only can select zero first, second, third or fourth, fifth. Sixth,.

C

And seventh yeah, because you you yeah, because that's just you know the maximum size of the vector is just you know, basically minus four and that's the highest number you can select. So you can select arbitrary four elements. You have to select consecutive right, yeah.

F

Element can be only for only position that is multiplication of foreign coming together right.

C

I mean that yeah, that kind of what Otto I mean that seems fine, but.

F

I wasn't sure like when I was proposing what should be appropriate in for those or with a droplet or quadruple or quiet for son.

C

Yeah I mean they all would work for me. I mean like as long as you have quad in the name, it kind of implies. It's for I, think I can I can get behind that.

F

Maybe I should explicitly saying, but it's selected for by it.

C

It's not for bites, though I know. Is it I guess, there's always four bites.

C

Right for bisexual I mean the question is: what happens when you have to support something that doesn't take bites? Then we are back to square one right. Then we have to pick a different name.

F

Well, based on this pair I, see that they had an instruction which is dot product of mixed sign, authorize and they still operate on Vice.

C

Yet they never support something like an in sixteen and that's fine. I just tried to avoid a naming convention rebel corner ourselves. That's what we said with first element index right of reverse.

A

C

Bytes, so if, if you believe they've already only ever support bytes, then saying by selected, four bytes is fine, but if you then have to ever support something else, then well, what did we call? This yeah.

F

B

Don't have a suggestion for a better name, my.

F

Good way, selected or LM I mean.

C

Four elements seems fine. That seems.

C

Okay, hopeful, it is I, like it I think.

B

Quadruple is the, if is the actual better name there. You've got double triple quadruple and so quadruplet make sense in that sense, yes,.

D

B

D

Wouldn't use just quadruple because we just add it half I'm sure at some point we'll add the double double floating point so at which point did now becomes a Miss named type well,.

B

I'm, the official name for that is quad.

A

D

Single double quad, yep.

D

Yeah I think quadruplet is fine. I actually, don't think for ple is a terrible name, but it's not very dot Neddy. So maybe I do.

D

Yeah I I, don't know that this thing can have a good name cuz. It yeah.

D

I mean this was that's true for a bunch of these symptoms. Right, it's it's like you. You really really absolutely need to know why you want to do it when you do it, because it's it's it's weird, they're all weird.

D

B

That is all of at least as far as I know, all of the arm intrinsics now reviewed, at least for everything, we're exposing 4.5.

C

I bought the formal question like the right scale index. Why do we say scaled scaled is just that it needs to be at the boundaries of four is ID there I.

B

Believe that's the case. Yes,.

F

I guess some are suggested this.

C

Yeah I don't feel strongly it to me. It seems more confusing there just right index I.

B

Think, with the term quadruple just right index is probably enough, but scaled index does provide just a little bit of clarity that like, if that you can't do 0 1 through like 16, it has to be 0, 1, 2 or 3.

C

C

F

Do it doing it t, is there to quadruple that should be control, Pope.

C

Now that's what Jeremy just talked about right like it seems like it would be confusing to leave it off.

C

Also, we just save one character, one way or the other, so it's it's not really doing much for us all right. So if that's it, then I will call it for today.

D

Yeah, unless you want to prove my span affiliates, okay,.

C

Let's do it, which one is that three.

D

Eight three four, eight.

C

You want so this is like API yeah.

D

So sent an email, there's, no logical, there's no thinking here. It's take everything that took a byte array that was already making defensive copies and add. A read-only span overload I.

E

See it so they would just forward to the other one and you would still do a defensive copy, but that's fine yeah.

D

I mean it's actually, the it ends up being the other way, and so the the array clone just becomes span to array but yeah sure.

E

But either way you just have what the double copy right. That's, basically India yeah.

D

Gotcha, it there's only one mild piece of thinking which is in certificate. Two collection.

D

Yeah, so oh no we're not the collection yeah! So in single certificates there were 1, 2, &, 3, parameter, overloads in the collection, there's only a 1 and a 3. So when I added the new one, I made the third parameter defaulted and then I added the default parameter to the existing one.

D

So there's bites bites password and bite, passwords and flags on certificates, but on collections it's just bytes and then byte password Flags, so I'm making flags optional here. So it looks like certs I.

C

See just make two changes, you add an overload and you also make the existing one optional. Yeah.

C

Yeah and then somebody has a problem with that.

C

E

Really straightforward yeah.

D

That's why I thought I could shove it in in four minutes.

B

If you're feeling lucky there's also another issue which is really small, that I got pinged by a community member asking. If we could review it's a 3, 6 105.

B

Basically, for system drawing, you can get significant perf increase if we just exposed cached bitmap, which exists in the GD plus API. Basically, as shown here.

D

So we need Marshall by ref object that.

B

I'm not sure, that's probably something I would ask yan and Aaron about. If it's not needed, then I would suggest we drop it. The rest of system drawing does have it, which is why it was put here for parity, is.

C

The cache movement of an existing API are just an internal API. It's.

B

An existing so its existing in the C++ GDI plus implementation. It's not exposed in managed.

C

So it's not yeah so that, basically, the only reason why we would have Marshall ref object is: let's say the API existed in full framework. Then we should just match its shape but like if, if it's a net new API, then I would not expose more stuff of Marshall a ref object. If we can help it so.

B

I'm screwed to me is.

D

There an explanation for why someone gave it a thumbs-down.

B

No, they did not, they did not comment.

C

Some people just don't make a BR I's.

C

So what does the cache bitmap actually do.

B

It it's just a it's a bitmap that is cached basic. Basically, the image is converted to the target format once and then it's cached as the target format, so you don't have to reconvert it every time and as shown with the implementation provided by the community member, that also proposed this, it can provide a nearly five times, perf increase by removing the need to keep reconverting to the target format.

D

Yes, oom: this is the same as json encoded text and what we just added for the ssl stream certificate context. It's the you gave me a thing. I validated it you're holding onto the validated or normalized state and just give that to me over and over again. So I don't need to keep asking if your input is saying you.

C

Mean that makes sense, I mean the only concern I have is like. Are there any other cases where we accept bitmaps to David? We should also have accept a cache bitmap, because if that's the only thing, then that's fine, but if it's all over the place, then you effectively create some debt, where you now have to replumb the same type to like a hundred places. So.

B

System that drawing is largely a mirror of the GDI plus C++ API, much like WinForms, is actually a mirror of MFC in many ways, and so we I don't think we'd be exposing cache bitmaps anywhere that the C++ implementation doesn't itself.

C

Right and so the so I take it, then that the C++ implementation also only has it on. Basically, whatever the device context of your blend is yes,.

B

As far as I know and.

C

Then that's fine I mean that's the only reason why I couldn't see a thumbs-down right because you could say well just make care. You know just make the caching thing part of the bitmap itself, so you don't have to replumb the world. But if that's the only receiver, then that's fine I mean that's, usually the problem, and you have these types right because now like, if you replace one exchange up, if another one like you know, string and utf-8 string or something, then that's just super painful right.

C

But if it's only one place where you sink it in, then that seems totally fair. Yeah.

B

That's at least all that I see with the search of the header and that's documented on.

A

B

Docs page for the C++ version.

C

Then I think that's fine too.

C

Okay, then, let's approve this one here as well and then move on.

D

Productive four minutes I think it's fair to say: that's probably the most API is ever approved in four minutes. That.

C

Might be true all righty, then I wish you guys a nice a nice day, and then we see each other tomorrow again, yep.

C

Bye bye online people.