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From YouTube: ORI FPGA and Remote Labs Meetup 13 September 2022
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A
All
right,
let's
get
started
today
we
have
a
stand-up
meeting
for
fpga
and
for
remote
labs
for
the
13th
of
september,
and
we
talk
about
what
we've
done
over
the
past
week
or
so
what
we
have
planned
for
the
next
week.
If
we
need
any
resources
and
if
we
have
any
roadblocks
that
we
need
help
removing,
so
let's
go
ahead
and
start
anchor.
Why
don't
you
tell
us
what's
going
on
with
the
encoder
work
and
anything
else
that
you
think
is
important
for
us
to
know
about.
B
B
And
run
it
on
ps,
so
I
have
mqtt
server
running
on
ps,
then
bluetooth
stream,
running
on
and
mqtt
control.
So
all
the
hard
coded
things
have
been
removed
and
the
register
mismatches
with
which
we
discussed
on
slack
earlier.
They
have
been
resolved
now
I
posted
and
I
posted
the
logs
also
when
I'm
due
to
stream
runs
now.
I
want
to
understand
what
runs
on
the
pc
that
will
communicate
with
pluto
stream
and
mosquito
server
running
on
ps.
B
B
B
A
In
versatin
or
in
on
fpga
okay,
I
will
look
at
it
right
after
this
meeting
sure.
Thank
you.
That's
me.
No!
Thank
you.
A
wonderful
amount
of
of
work
on
two
really
interesting
projects
and
I'm
really
looking
forward
to
versatin
being
being
unveiled
and
very
much
looking
forward
to
the
our
downlink
encoder
transmitting.
A
A
A
So
what
I'm
starting
out
with
here
is
a
very
simple
frequency
shift,
keying
receiver
in
verilog-
and
this
is
sort
of
what
it
looks
like
this-
is
from
a
repo,
an
open
source
repository
I'll,
put
the
link,
the
links
at
the
end
that
we
found
and
the
the
basic
top
level
block
looks
like
this.
So
you
have
a
baseband
clock
and
then
you
have
these
two
values:
v
short
and
v,
long
and
a
flag
bit
the
out.
The
output
is
a
register.
That's
bit
out.
A
A
register
in
verilog
means
a
variable
that
holds
its
value
between
updates.
So
it's
confusing,
because
the
registers
also
mean
something
in
hardware,
but
in
verilog
register
is
a
type
of
variable.
Inside
this,
this
top
block.
You
can
see
the
two
s's
and
the
e
dot
d
edge
detector
and
two
synchronizers.
A
So
when
you
look
at
the
synchronizer
block,
it
has
a
clock
and
then
it
has
a
16-bit
input
and
a
16-bit
output
and
it
is
really
a
synchronizer
it.
It
helps
line
things
up
in
time,
and
so,
when
we
dug
into
the
code
for
well
first,
we
dug
into
the
code
for
the
edge
detector
and
it
takes
something
called
a
flag
bit
and
as
you'll
see
the
flag
bit
is
the
most
significant
bit
from
the
adc.
A
So
every
positive
going
clock.
We
we
check
this.
We
have
something
like
a
shift
register
inside
and
what
we're
looking
for
is
the
is
the
negative
going
signal
for
the
for
flag
bit,
so
the
negative
going
when
the
most
significant
bit
of
the
adc
goes
negative.
We
pay
attention
to
that
signal
and
we
call
it
flag
bit
cross
okay,
and
so
here's
where
we
start
to
look.
I
think
this
is
the
synchronizer.
So
we
we
picked
through
the
synchronizer
it's
from
edis
research.
A
So
this
is
a
a
body
of
work
from
from
edis
research.
Some
some
very
neat
stuff.
It's
it's
written
in
a
very
flexible
way,
so
we
should
probably
talk
more
about
that,
but
what
we
did
is
just
we
went
through
the
code
to
make
sure
we
understood
what
it
was
doing
and
we're
we're
satisfied
that
just
what
it's
doing
is
is
synchronizing
values
to
that
may
be
changing
to
to
the
clock.
A
Let
you
count
more
baseband
clocks
and
the
higher
frequency
tones
you
you
hit
that
negative
going.
You
know,
transition
earlier,
and
these
v
short
and
v
long
are
selected
to
where
we
can
differentiate
between
our
two
tones,
so
this
binary
fsk,
so
the
limitations
on
the
bb
clock.
Obviously
it
can't
be
more
than
2
to
the
16th
faster
than
the
waveform,
where
you'll
roll
it
and
then
here's
another
view
of
like
how
these
these
two
limits
are
are
can
be
seen.
A
So
this
is
a
very
simple
fsk
receiver
to
start
out
with
the
original
repo
is
here,
we've
worked
it
and
we'll
add
some
documentation
and
we're
thinking
of
modifying
it
to
to
4
fsk,
which
is
what
we
are
going
to
use
on
the
uplink.
So
this
works
when
the
signal
is
really
pretty
solid,
high
snr-
and
it
is
very
simple:
it's
not
a
lot
of
lines
of
verilog.
It
was
tested
on
a
z
board,
so
this
is.
This
is
something
that
we
can.
A
A
There
are
a
lot
of
more
complicated
ways
that
give
you
higher
performance
to
do
up
like
receiver,
but
we
got
to
start
somewhere
so
having
also
having
a
variety
of
examples
of
of
good
code
for
for
hdl,
for
people
to
learn.
That's
that's
one
of
our
missions
at
ori,
so
I'm
going
to
stop
sharing
the
screen
and
then
does
anybody
have
any
questions
about
this
or
or
any
ideas
for
next
steps
or
criticisms
of
next
steps
to
to
kind
of
expand
it
to
for
fsk
and
and
do
some
modeling.
A
Okay,
that's
what
we'll
that's?
What
we'll
be
doing
in
the
in
the
in
the
near
term?
It'd
be
really
nice
if
we
could
get
something
working
showing
it
working,
in
other
words,
match
the
this
particular
repositories
over
the
year
tests
on
the
zed
board
by
next
week.
But
that
might
be.
But
I
don't
know
what
problems
we
will
encounter,
because
so
our
goal
will
be
to
get
something:
a
very
simple
receiver,
uplink
receiver
working,
so
that
we
can
capture
the
signals
that
we're
generating
with
opulent
voice
our
protocol
for
the
uplink.
C
Very
little
going
on
in
the
remote
lab
this
week
I
did
reboot
some
of
the
vms
that
had
been
sitting
there
for
a
while
just
general
maintenance
everything
otherwise
is
situation
normal,
not
too
much
going
on
fpga
wise
either.
For
me,
I
helped
out
a
little
bit
with
that
fskd
modulator,
but
otherwise
I've
been
working
on
other
things.
D
Well,
that's
fascinating
stuff
that
you
put
on
the
whiteboard
there
I
haven't
said
board.
I've
been
looking
for
something
to
do
with
it
recently.
I
spent
a
lot
of
time
with
it
some
years
ago
and
I
haven't
picked
it
up
since
and
now
I'm
getting
really
interested
again.
So
if
you
have
any
software
that
I
can
play
with,
I
guess
I
guess
you've
got
it
on
the
on
the
repository.
I
might
download
it
and
get
out
my
zed
board
again.
A
Yeah
this
would
be.
This
would
be
something
that
that
I
think
would
be
pretty
pretty
fun.
I
was
happy
to
find
it
so
yeah,
it's
a
zed
board
and
then
I
think
they
added
the
fmc
fm
coms
3,
which
I
know
is
like
a
sort
of
a
rf
mezzanine
type
of
board,
but
yeah
the
I'll
post,
the
the
link
to
the
to
the
repository
from
mcu
pro
and
and
if
you
can
take
a
crack
at
it
and
enjoy
it
then
that'll
be
that's
a
victory
as
far
as
I'm
concerned.
D
D
A
D
D
A
C
A
Cool
okay,
we'll
keep
working.
These
are
the
different
areas
we
got.
You
know
lots
of
oh
yeah
and
there's
there's
our
fpga
content
is
going
to
be
represented
this
upcoming
weekend
at
ham
expo.
So
we
have
a
total
of
five
talks
at
ham
expo
that
cover
a
variety
of
work
and
our
high
flyer
proposal
for
the
open
source
heo
will
be
one
of
the
talks
and
in
the
talk
we
go
into
kind
of
our
view
of
like
how
the
the
fpga
board
will
function
with
talks
about
fault
detection.
A
Some
talks
talk
about
sort
of
failover
operation.
Things
like
that.
So
you
know.
We've
talked
a
little
here
about
the
progress
on
the
uplink
and
we've
talked
about
progress
on
the
on
the
down
link.
The
stuff
that
happens
in
between
will
become
very
important
very
soon,
so
all
of
that
fun
stuff
which
may
or
may
not
be
fpga.
A
Obviously
it
may
be
firmware,
but
we
have
a
decent
idea
about
how
we
want
things
to
work,
so
we
are
going
to
need
prototypes
of
that
functioning
working
stuff
over
you
know,
that's
that's
the
goal
and
that's
something
we
prioritize
pretty
high,
so
be
aware.
We
have
lots
of
content
that'll
be
presented
at
the
upcoming
ham
expo.
A
All
of
this
will
all
the
recordings
of
the
presentations
as
soon
as
the
platform
closes,
because
ham
expo
platforms
open
for
a
month
as
soon
as
it
closes,
then
our
youtube
playlist
of
all
of
these
talks
will
be
live
over
over
on
youtube
and
all
of
the
talks
will
also
be
on
vimeo
for
as
long
as
ham
expo's
around
they
have.
They
keep
all
of
the
talks
from
from
all
of
their
their
expos
and
their
showcase
over
on
vimeo,
so
good
stuff.
A
A
So
the
projects
area
of
ham
expo
is
where
you
can
put
a
poster
session
like
we
have
or
a
document
or
about
a
product.
So
it's
divided
into
projects
that
are
amateur
or
non-profit
and
products
from
from
companies.
So
you'll
see
a
variety
of
of
showcases
and
in
most
most
cases
there
are
these
ability
to
have
like
a
q
a
session.
You
know
you
leave
a
question
for
the
for
the
person
that
presents
the
that
particular
project,
and
so
usually
ham
expo
is
semi-live
presentations.
A
D
I
I
forgot
to
share
something
with
you:
go
ahead,
have
received
my
first
ever
pc
board
and
with
a
complex
outline,
I've
never
received.
It
was
not
rectangular
before
this
is
a
mezzanine
board
for
the
pluto,
and
I
think
you've
seen
pluto's
before,
and
this
is
designed
to
provide
additional
features
to
a
pluto
to
make
it
work
on
a
satellite
system.
D
D
A
All
right!
Everybody
see
you
on
slack
and
on
the
mailing
list
and
if
all
goes
well
here
next
week
for
another
another
meet
up.
Thank
you.
So
much
all
of
you
for
all
of
the
hard
work
for
all
of
the
different
things
that
that
you're
doing
it's
a
it's
a
privilege
to
to
be
able
to
to
see
it
and
to
help
it
happen.