22 Apr 2022
Watch 7 exciting technology presentation by CHIPS Alliance participants, and see how open source hardware is changing the game.
- 11 participants
- 4:11 hours
12 Oct 2021
The CHIPS Alliance held its Fall 2021 workshop, to share milestones, progress, updates and more.
Slides are available at: https://chipsalliance.org/workshops-meetings/
Slides are available at: https://chipsalliance.org/workshops-meetings/
- 12 participants
- 3:21 hours
30 Mar 2021
The CHIPS Alliance held its Spring 2021 workshop, to share milestones, progress, updates and more.
Slides are available at: https://events.linuxfoundation.org/chips-alliance-spring-workshop/program/schedule/
Slides are available at: https://events.linuxfoundation.org/chips-alliance-spring-workshop/program/schedule/
- 14 participants
- 3:42 hours
17 Sep 2020
CHIPS Alliance, the open source RTL hardware and software development tool organization, gathered to share milestones, progress, updates and more.
Open Design Verification – Tao Liu, Google
Enabling Fully Open Source And Continuous Integration-Driven Flows in ASIC and FPGA Development – Michael Gielda, Antmicro
The Emergence of the Open-Source AIB Chiplet Ecosystem – David Kehlet, Intel
Chipyard: Design of Customized Open-Source RISC-V SoCs – Borivoje Nikolic, UC Berkeley
SweRV and/or OmniXtend Milestones – Zvonimir Bandic, WDC
Chisel & FIRRTL for next-generation SoC designs – Jack Koenig, SiFive
Open ML Accelerator – Anoop Saha, Mentor
Cloud Based Verification of RISC-V Processors – Dan Ganousis, Metrics
OpenROAD Open RTL-to-GDS Update – Andrew Kahng, OpenRoad/UCSD, and Mohamed Kassem, Efabless
Open Source FPGA Tooling, Our Journey from Resistance to Adoption – Brian Faith, QuickLogic
Open Design Verification – Tao Liu, Google
Enabling Fully Open Source And Continuous Integration-Driven Flows in ASIC and FPGA Development – Michael Gielda, Antmicro
The Emergence of the Open-Source AIB Chiplet Ecosystem – David Kehlet, Intel
Chipyard: Design of Customized Open-Source RISC-V SoCs – Borivoje Nikolic, UC Berkeley
SweRV and/or OmniXtend Milestones – Zvonimir Bandic, WDC
Chisel & FIRRTL for next-generation SoC designs – Jack Koenig, SiFive
Open ML Accelerator – Anoop Saha, Mentor
Cloud Based Verification of RISC-V Processors – Dan Ganousis, Metrics
OpenROAD Open RTL-to-GDS Update – Andrew Kahng, OpenRoad/UCSD, and Mohamed Kassem, Efabless
Open Source FPGA Tooling, Our Journey from Resistance to Adoption – Brian Faith, QuickLogic
- 12 participants
- 2:60 hours
